Factors Affecting RF PCB Design
With the rapid development of a new round of IoT devices, smart wearable devices, wireless headphones, and 5G and Wi-Fi 6 technologies, the demand for Bluetooth devices and smartphones is continuing to rise worldwide. In China, this trend has prompted electronic engineers to pay more attention to the skills and methods of RF circuit design. Especially in the development of devices that support multiple wireless protocols and achieve efficient signal transmission, RF circuit design has become one of the most challenging links in the entire hardware design process.
The difficulty of RF circuit board design is mainly reflected in its sensitivity to high-frequency signals and the extremely high requirements for design details. Any small deviation in the design may cause signal interference, increased power consumption, or decreased device performance. With the further upgrade of the communication and smart device fields in 2024, the design pressure faced by engineers is also increasing. For example, devices that support Bluetooth 5.3 or higher require more efficient spectrum utilization, while smart home devices and automotive communication devices need to meet more complex multi-band and multi-protocol compatibility requirements.
To succeed in RF circuit design at the first try, design engineers must attach great importance to the following two key points: careful planning and attention to details. Careful planning includes not only the pre-design of the overall system architecture, but also in-depth analysis of PCB routing, impedance control, and component selection. Attention to detail is reflected in every aspect of the design, from optimizing the length of the signal path to strictly controlling the integrity of the ground plane.
In addition, the use of modern design tools and the advancement of simulation technology provide engineers with more efficient support. In 2024, new technologies such as AI-driven PCB simulation tools and automated RF debugging platforms are helping design teams shorten development cycles and increase success rates. However, this also means that engineers need to constantly learn and adapt to new technologies in order to remain competitive in a rapidly changing industry.
In summary, in the face of the continued growth in demand for IoT and wireless communication devices, Chinese electronic engineers need to look at RF circuit design from a more comprehensive perspective, continuously accumulate experience, and use advanced tools to achieve breakthroughs. This not only helps meet the needs of the current market, but also lays a solid foundation for the further development of future technologies. Radio frequency (RF) circuit board design is often described as a "black art" because there are still many uncertainties in theory, but this view is only partially correct. There are also many guidelines and rules that should not be ignored in RF circuit board design. However, the real practical skill in actual design is how to compromise these rules and regulations when they cannot be accurately implemented due to various design constraints.
Of course, there are many important RF design factors worth discussing, including impedance and impedance matching, dielectric materials and laminates, and wavelength and standing waves, but this article will focus on the various issues related to RF board partition design.
Today's mobile phone designs are becoming more and more complex, which makes RF board design more and more difficult. The industry is very competitive, and everyone is looking for ways to integrate the most functions with the smallest size and the lowest cost. Analog and RF circuits are tightly packed together. There is very little space to separate their respective problem areas, and considering cost factors, it is incredible that multi-purpose chips can integrate multiple fields on a very small die, and the pins connecting to the outside world are arranged very closely, so RF, IF, analog and digital signals are very close, but they are usually electrically unrelated. Power distribution can be a nightmare for designers. In order to extend battery life, different parts of the circuit are time-sharing according to need, and the switching is controlled by software. This means you may need to provide your phone with several types of working power sources.
When designing an RF layout, there are several general principles that must be met first:
Isolate the high-power RF amplifier (HPA) and low-noise amplifier (LNA) as much as possible. Simply put, the high-power RF transmitter circuit is based on the low-power RF receiver circuit. If you have a lot of physical space on your PCB, you can easily do this, but there are usually many components and the PCB space is small, so this is usually not possible. You can put them on both sides of the PCB, or let them work alternately instead of working at the same time. High-power circuits sometimes also include RF buffers and voltage-controlled oscillators (VCOs).
Make sure that there is at least one whole ground in the high-power area of the PCB, preferably without vias on it. Of course, the more copper, the better. Later, we will discuss how to break this design principle as needed and how to avoid the problems that may arise from it. Chip and power supply decoupling is also extremely important, and several methods of implementing this principle will be discussed later. RF outputs usually need to be far away from RF inputs, which we will discuss in detail later. Sensitive analog signals should be as far away from high-speed digital signals and RF signals as possible. How to partition? Design partitions can be broken down into physical partitions and electrical partitions. Physical partitioning mainly involves issues such as component layout, orientation, and shielding; electrical partitioning can be further decomposed into partitioning for power distribution, RF routing, sensitive circuits and signals, and grounding.
Let's discuss the physical partitioning issue first. Component layout is the key to achieving an excellent RF design. The most effective technique is to first fix the components located on the RF path and adjust their orientation to minimize the length of the RF path, keep the input away from the output, and separate high-power circuits and low-power circuits as far as possible.
The most effective circuit board stacking method is to arrange the main ground plane (main ground) on the second layer under the surface layer and run the RF line on the surface as much as possible. Minimizing the size of vias on the RF path can not only reduce the path inductance, but also reduce the number of virtual solder joints on the main ground, and reduce the chance of RF energy leaking to other areas in the stacked board.
In high-frequency PCB design, physical isolation and layout optimization are crucial to reducing interference between RF and IF signals. Although linear circuits such as multi-stage amplifiers can reduce inter-module interference to a certain extent, circuits such as mixers, duplexers, and intermediate frequency amplifiers may still cause problems due to the interaction of multiple RF/IF signals. Therefore, in PCB design, priority should be given to ensuring that the signal path is short and straight, and the ground layer is reasonably isolated to reduce interference. When path crossing is inevitable, the coupling interference can be further reduced by cross-crossing.
RF path design is a key factor in the performance of the entire PCB, which directly affects the integrity and power efficiency of signal transmission. To this end, engineers need to spend a lot of time in the layout stage to optimize component layout, signal path and thermal management solutions. In common designs, low-noise amplifiers (LNA) and high-power amplifiers (PA) are usually arranged on different sides of the PCB, connected to the antenna and baseband processor through a duplexer. This arrangement can reduce the interference of high-power signals on low-noise circuits while optimizing thermal management.
In addition, straight through holes introduce parasitic inductance and capacitance, which may have an adverse effect on high-frequency signals. A common method is to use blind or buried via technology, while placing straight through holes in an area away from the RF signal path to reduce interference. By optimizing PCB layout and via design, signal quality and overall PCB performance can be further improved.
Sometimes it is not possible to ensure sufficient isolation between multiple circuit blocks. In this case, it is necessary to consider using a metal shield to shield the RF energy in the RF area, but metal shields also have problems, such as: the cost of the shield itself and the assembly cost are very expensive;
It is difficult to ensure high precision when manufacturing irregular metal shields, and rectangular or square metal shields restrict the layout of components; metal shields are not conducive to component replacement and fault location; because metal shields must be soldered to the ground, they must be kept at an appropriate distance from the components, so they need to occupy valuable PCB board space.
It is very important to ensure the integrity of the shield as much as possible. The digital signal line entering the metal shield should be routed on the inner layer as much as possible, and it is best that the PCB layer below the routing layer is the ground layer. The RF signal line can go out from the small gap at the bottom of the metal shield and the wiring layer at the ground gap, but as much ground as possible should be laid around the gap, and the ground on different layers can be connected together through multiple vias.
Despite the above problems, metal shields are very effective and are often the only solution to isolate critical circuits.
In order to improve the effectiveness of the shield, its integrity should be ensured as much as possible. Digital signal lines should be laid out in the inner layer of the shielding case first, and the noise risk can be further reduced by wiring close to the ground layer. RF signal lines can be led out from the small notch at the bottom of the shielding case, but it is necessary to ensure that the grounding copper foil is covered around the notch, and the grounding of different layers is connected through multiple vias to enhance the shielding effect.
Despite the above problems, metal shielding cases are still one of the most effective solutions for isolating critical circuits, especially when electromagnetic compatibility cannot be achieved by other methods.
In addition, effective decoupling design of chip power supply is particularly important in modern PCBs. Many RF chips with integrated linear circuits are extremely sensitive to power supply noise. Therefore, each chip usually needs to use up to four capacitors and one isolation inductor to filter out power supply noise. The layout of these decoupling components needs to follow the following principles:
1. The capacitor should be as close to the power pin of the chip as possible, especially the small capacitance capacitor with a higher self-resonance frequency should be directly connected to the pin.
2. The capacitor with larger capacitance should be far away from the chip pin to filter out low-frequency noise.
3. The isolation inductor should be arranged on the power line to block the propagation of high-frequency noise.
Through reasonable decoupling design, the impact of power supply noise on RF circuit performance can be significantly improved, thereby ensuring the stability and reliability of the overall PCB performance.
The minimum capacitor value is usually determined by its self-resonant frequency and low pin inductance, and the value of C4 is selected accordingly. The values of C3 and C2 are relatively large due to their own pin inductance, so the RF decoupling effect is poor, but they are more suitable for filtering lower frequency noise signals. Inductor L1 prevents RF signals from coupling from the power line to the chip. Remember: all traces are potential antennas that can both receive and transmit RF signals. In addition, it is also necessary to isolate the induced RF signals from critical lines.
The physical location of these decoupling components is also usually critical. Figure 2 shows a typical layout method. The layout principles of these important components are: C4 should be as close to the IC pin as possible and grounded, C3 must be closest to C4, C2 must be closest to C3, and the connection traces between the IC pin and C4 should be as short as possible. The ground ends of these components (especially C4) should usually be connected to the ground pin of the chip through the next layer.
The vias connecting the components to the ground layer should be as close to the component pads on the PCB board as possible. It is best to use blind holes punched on the pads to minimize the inductance of the connecting wires. The inductor should be close to C1.
An integrated circuit or amplifier often has an open-drain output, so a pull-up inductor is needed to present a high-impedance RF load and a low-impedance DC source. The same principles apply to decoupling the power supply at the inductor. Some chips require multiple power supplies to operate, so you may need two or three sets of capacitors and inductors to decouple them separately, which may be a problem if there is not enough space around the chip.
Remember that inductors are rarely placed in parallel, as this will form an air-core transformer and induce interference signals to each other, so the distance between them should be at least equal to the height of one of the devices, or arranged at right angles to minimize their mutual inductance.
The principles of electrical partitioning are roughly the same as physical partitioning, but there are some additional factors. Some parts of modern cell phones use and are controlled by software to extend battery life. This means that cell phones need to run different operating voltages, multiple power supplies, which brings more problems to isolation. Power is usually introduced at the connector and immediately decoupled to filter out any noise from outside the circuit board, and then distributed after passing through a set of switches or regulators.
In modern mobile phones, most circuits have low DC currents, so the width of most signal traces is usually not a critical issue. However, for the power supply design of high-power amplifiers (PAs), it is still necessary to separately arrange high-current power supply traces as wide as possible to minimize transmission voltage drop and current loss. To this end, it is common and effective to use multiple vias to transfer current from one layer to another. In addition, to ensure the stable performance of the high-power amplifier, an efficient decoupling network needs to be arranged at the power pin end, usually including a combination of multiple capacitors and inductors to filter out power supply noise. If the decoupling is insufficient, high-power noise may radiate to the entire PCB, causing serious interference problems.
The grounding treatment of high-power amplifiers is also critical. For this reason, it is usually necessary to design a dedicated ground plane in the PA area, and if necessary, cooperate with a high-precision metal shielding cover to ensure that electromagnetic interference is controlled within a reasonable range. The design of the shielding cover needs to be coordinated with the layout to meet space requirements and reduce costs.
In most cases, ensuring that the radio frequency (RF) output is physically isolated from the RF input is still a key requirement. This principle also applies to RF devices such as amplifiers, buffers and filters. If the output signal of the amplifier or buffer is fed back to the input with a specific phase and amplitude, self-oscillation may occur. Under ideal conditions, the device can work stably in a variety of temperature and voltage environments; however, if the design is improper, instability may occur, and noise and intermodulation distortion may be increased, significantly affecting the RF performance.
In addition, the input and output isolation of the filter is also a design focus. If the input signal line needs to be looped back to the output of the filter, its passband characteristics may be seriously damaged. To optimize the isolation effect, a continuous closed ground plane is arranged around the filter in modern designs, and a dedicated ground plane is arranged at the bottom layer, and connected to the main ground plane through multiple vias. The signal line should be arranged as far away from the filter pins as possible, and a continuous shielding layer should be maintained.
Modern mobile phone PCB design has higher requirements for the integrity of the grounding system. Special attention must be paid to avoid inadvertently introducing undesirable coupling paths, such as cross-region ground rings or floating ground phenomena. Through careful routing and partition isolation, the RF performance and overall electromagnetic compatibility (EMC) are ensured to reach the best level.
Figure 3 details this grounding method.
Sometimes you can choose to run single-ended or balanced RF signal lines, and the same principles about crosstalk and EMC/EMI apply here. Balanced RF signal lines can reduce noise and crosstalk if they are routed correctly, but their impedance is usually higher, and it may be difficult to maintain a reasonable line width to get an impedance that matches the signal source, line, and load.
Buffers can be used to improve isolation because they can split the same signal into two parts and use them to drive different circuits. In particular, local oscillators may need buffers to drive multiple mixers. When a mixer reaches common-mode isolation at the RF frequency, it will not work properly. Buffers can isolate impedance changes at different frequencies very well, so that circuits do not interfere with each other. Buffers are very helpful in design. They can be placed right behind the circuit to be driven, making high-power output lines very short. Since the input signal level of the buffer is relatively low, they are less likely to interfere with other circuits on the board.
There are many very sensitive signal and control lines that need special attention, but they are beyond the scope of this article, so this article will only briefly discuss them and will not go into detail.
Voltage controlled oscillators (VC0) can convert changing voltage into changing frequency, which is used for high-speed channel switching, but they also convert tiny noise on the control voltage into tiny frequency changes, which adds noise to the RF signal. In general, you can no longer remove noise from the RF output signal after this stage. So where is the difficulty? First, the expected bandwidth of the control line may range from DC to 2MHz, and it is almost impossible to remove such a wide bandwidth of noise through filtering; second, the VC0 control line is usually part of a feedback loop that controls the frequency, and it may introduce noise in many places, so the VC0 control line must be handled very carefully.
Make sure that the ground of the lower layer of the RF trace is solid, and all components are firmly connected to the main ground and isolated from other traces that may bring noise. In addition, make sure that the power supply of VC0 has been fully decoupled. Since the RF output of VC0 is often a relatively high level, the VC0 output signal is easy to interfere with other circuits, so special attention must be paid to VC0. In fact, the VCO is often placed at the end of the RF area, and sometimes it also needs a metal shield.
The resonant circuit (one for the transmitter and the other for the receiver) is related to the VCO, but has its own characteristics. In simple terms, the resonant circuit is: a parallel resonant circuit with a capacitive diode that helps set the VCO operating frequency and modulate the voice or data onto the RF signal.
All VCO design principles also apply to the resonant circuit. Because the resonant circuit contains a relatively large number of components, a wide distribution area on the board, and usually operates at a very high RF frequency, the resonant circuit is usually very sensitive to noise. The signals are usually arranged on adjacent pins of the chip, but these signal pins need to cooperate with relatively large inductors and capacitors to work, which in turn requires that these inductors and capacitors must be located very close and connected back to a control loop that is very sensitive to noise. This is not easy to achieve.
The automatic gain control (AGC) amplifier is also a problem area. Both the transmit and receive circuits have AGO amplifiers. The AGC amplifier is usually effective in filtering noise, but the ability of cellular phones to handle rapid changes in transmit and receive signal strength requires a relatively wide bandwidth of the AGC circuit, which makes it easy for the AGC amplifier in some critical circuits to introduce noise.
Good analog circuit design techniques must be followed when designing AGC circuits, which are related to very short op amp input pins and very short feedback paths, both of which must be far away from RF, IF or high-speed digital signal traces. Likewise, good grounding is essential, and the chip's power supply must be well decoupled. If a long line must be run at the input or output, it is best to run it at the output, which usually has much lower impedance and is less likely to induce noise. Generally, the higher the signal level, the easier it is to introduce noise into other circuits.
In all PCB designs, it is a general principle to keep digital circuits away from analog circuits as much as possible. It also applies to RF PCBs. Considering the layout of components and thorough layout evaluation are very important. Design changes caused by negligence may result in a nearly completed design having to be torn down and re-designed. This serious consequence caused by negligence is not a good thing for your personal career development anyway.
RF lines should also be kept away from analog lines and some critical digital signals. All RF traces, pads and components should be filled with as much ground copper as possible and connected to the main ground as much as possible. Micro-via construction boards similar to breadboards are very useful in the RF circuit development stage. If you choose a construction board, you can use as many vias as you want without spending any money. Otherwise, drilling holes on ordinary PCB boards will increase development costs, which will increase costs in mass production.
If RF traces must pass through signal lines, try to lay a layer of ground connected to the main ground along the RF traces between them. If this is not possible, make sure they are crossed in a straight line, which can minimize capacitive coupling. At the same time, try to lay more ground around each RF trace and connect them to the main ground. In addition, minimizing the distance between parallel RF traces can minimize inductive coupling.
The isolation effect is best when a solid, monolithic ground plane is placed directly under the surface layer on the first layer, although other practices can also work when designing carefully. I have tried to separate analog, digital and RF lines by dividing the ground plane into several pieces, but I have never been satisfied with the results, because in the end there are always some high-speed signal lines that have to pass through these separate grounds, which is not a good thing.
RF lines should also be kept away from analog lines and some critical digital signals. All RF traces, pads and components should be filled with as much ground copper as possible and connected to the main ground as much as possible. Micro-via construction boards like breadboards are very useful in the RF circuit development stage. If you choose a construction board, you can use as many vias as you like without spending any money, otherwise it will be useful in ordinary: drilling holes on PCB boards will increase development costs, which will increase costs in mass production.
If RF traces must pass through signal lines, try to lay a layer of ground connected to the main ground along the RF traces between them. If this is not possible, be sure to ensure that they are crisscrossed, which can minimize capacitive coupling, and at the same time, try to lay more ground around each RF trace and connect them to the main ground. In addition, minimizing the distance between parallel RF traces can minimize inductive coupling.
A solid, monolithic ground plane works best when placed directly under the surface layer on the first layer, although other approaches work with careful design. I've tried splitting ground planes to isolate analog, digital, and RF lines, but I've never been happy with the results because I always end up with some high-speed signal lines running through the separate ground planes, which is not a good thing.
On each layer of the PCB, place as many ground planes as possible and connect them to the main ground plane. Place traces as close together as possible to increase the number of plots on internal signal layers and power distribution layers, and adjust the traces appropriately so that you can place ground connection vias to isolated plots on the surface layer. Avoid creating free ground planes on PCB layers because they can pick up or inject noise like a small antenna. In most cases, if you can't connect them to the main ground plane, then you're better off removing them.
Summary of this chapter:
When you get an engineering change order (ECO), stay calm and don't easily undo all your hard work. When you get an Engineering Change Order (ECO), it's easy for an ECO to throw your work into disarray, no matter how minor the changes that need to be made are. When you have to complete a job within a certain time period, it's easy to forget something critical, let alone make changes.
Whether it's a "black art" or not, following some basic RF design rules and paying attention to some good design examples will help you complete your RF design work. Successful RF design can only be achieved by paying careful attention to every step and every detail of the entire design process, which means that thorough and careful planning must be carried out at the beginning of the design, and comprehensive and continuous evaluation of the progress of each design step.
